27 June 2014

Further Improvement of NAND Flash Reliability

F&S has further improved the reliability of NAND Flashs on boards with Freescale Vybrid processors.
A process was developped to prevent a failure of the flash by „Read Disturbance“.
The Block-Swap algorithm refreshes blocks, which are likely to fail soon.
Data integrity remains safe in case of a voltage drop during refreshment.
Also, the usage of Hardware ECC with a high number of correctable bit errors and the use of robust file systems, which were optimized for NAND Flash (e.g. UBI or the F&S in-house development F3S), keep the system in most situations bootable and the data system in a defined state.

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