JTAG Debug Adapter
The NXP Vybrid CPU has two cores: Cortex-A5 and Cortex-M4.
This adapter offers an inexpensive solution for accessing both cores via JTAG.
In conjunction with the ARM development area DS-5, code can be translated for both cores, the originated binary can be loaded into the cores and the code can be tested with the debugger.
ARM DS-5 is available as a free starter version (256kB Binary) or as well as a 30-days test version.
Scope of Delivery
- JTAG Debugger (CMSIS-ADP)
- USB cable
- Debug cable