In the NXP processors used by F&S Elektronik Systeme, an ARM Cortex-A core is combined with an additional ARM Cortex-M core on a single chip. This allows customers to run a high-performance operating system such as Linux or Windows Embedded (Compact/10 IoT) on the Cortex-A, while simultaneously executing a C++ program or the real-time operating system FreeRTOS on the Cortex-M. This opens up entirely new application possibilities. For example, the Cortex-M can handle hard real-time requirements. Thanks to the F&S native bootloader, interfaces such as CAN or I²C can be accessed via the Cortex-M within just a few milliseconds. It is also straightforward to power down the Cortex-A and process background tasks with the Cortex-M to reduce power consumption.

Both cores are connected to the internal interconnect bus matrix, allowing them to access all peripherals (with the exception of the i.MX 7ULP). In addition to the ARM® modules for memory protection (SCU and TrustZone), NXP has integrated a Resource Domain Controller (RDC), which significantly simplifies isolating the two cores from each other. The available interfaces and memory regions can be freely assigned to one core or both.

For communication between the two cores, a semaphore unit (SEMA) with at least 16 hardware semaphores and a Messaging Unit (MU) are provided. The Messaging Unit allows straightforward message exchange between the cores, with each core having at least four dedicated send and receive mailboxes.